TAIPEI, Taiwan, May 26, 2026 (GLOBE NEWSWIRE) — Astera Labs, Inc. (Nasdaq: ALAB), a leader in semiconductor-based connectivity solutions for rack-scale AI infrastructure, will host press and industry analysts at Computex 2026 in the Taipei Nangang Exhibition Center Business Area, Hall 1 (TaiNEX 1), Room 303, Third Floor.
WHAT: Astera Labs will use its Computex program to highlight the company’s latest news, rack-scale AI connectivity strategy and collaboration with leading AI platform providers and Taiwanese system and manufacturing partners.
Attendees will get a look at Astera Labs’ complete connectivity portfolio, including the first public demonstration of the Scorpio™ X Series Smart Dust Switch with 320 Lanesultra-low latency linear optical connectivity, COSMOS-compliant rack-level validation, and production-ready systems from Astera Labs and ecosystem partners.
Demonstrations will emphasize:
- Open scalable AI platforms built on Scorpio Fabric Switches, including MGX-based reference designs for rapid deployment of AI platforms.
- Rack-scale validation for scale-up fabrics, including rigorous PCIe 6 testing with active electrical cables, CPUs and GPUs, plus rack-scale observation and diagnostics with COSMOS Explorer.
- Copper and optical connectivity for the next generation of AI infrastructure, including active electrical cables, linear optical connectivity and 200G/lane technology with high-fidelity SerDes diagnostics.
- Silicon, validation platforms and partner systems highlighting how Astera Labs accelerates the customer journey from onboarding to deployment, from interoperability, performance testing and production-ready platforms
During a featured fireside chat on Wednesday, June 3, Thad Omura, SVP and GM, Compute Connectivity Group, Astera Labs, will share insights into the tailor-made connectivity solutions.
Technical calls include:
- The evolving frontier of copper and optical
- Next-generation retimers for AI systems
- Inference Tokenomics: Make Every Token Count with KV Cache Optimization
- The new engine that drives frontier AI forward
- Streamline, automate and accelerate your hardware workflows with COSMOS Tools
- Scaling 200G/Lane Ethernet: Benefits of Standard Footprint Designs
WHEN: Computex 2026: June 2-5, 2026 (all times listed are in Taipei time)
- Press conference, demo tour and Q&A with audience: Wednesday, June 3, 10:00 AM – 11:00 AM
- Fireside chat with ecosystem partner: Wednesday, June 3, 11:00 AM – 11:30 AM
- Happy hour reception: Wednesday, June 3, 3:00 PM – 5:00 PM
WHERE: Taipei Nangang Exhibition Center, Hall 1 (TaiNEX 1), Room 303, Third Floor
WHO: Press and industry analysts on AI infrastructure, large-scale systems and connectivity innovation.
WHY: The event is designed to give media and industry analysts direct access to Astera Labs leaders, the latest announcements, live technical demonstrations, and ecosystem conversations on accelerating AI infrastructure deployment.
About Astera Labs
Astera Labs (Nasdaq: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink Fusion, PCIe® and UALink™ semiconductor technologies with the company’s COSMOS software suite to unite diverse components into cohesive, flexible systems that provide end-to-end scale-up and scale-out connectivity. The company’s custom connectivity solutions complement its standards-based portfolio, allowing customers to implement custom architectures to meet their unique infrastructure requirements. Discover more at http://www.asteralabs.com.
Forward-Looking Statements
This communication contains certain forward-looking statements regarding Astera Lab’s expectations regarding the parties it will host, the subject matter of the fireside chats and technical discussions, and the items that will be demonstrated during the Computex 2026 program, including Astera Lab’s entire connectivity portfolio (e.g., the Scorpio supported validation), features and capabilities; its rack-scale AI connectivity strategy; as well as the systems produced as part of and the impact of the collaborations. Such forward-looking statements are introduced by words such as “designed”, “strategy”, “will” and variations of such words and similar expressions. Such statements involve risks and uncertainties, many of which are beyond the control of Astera Labs, that could cause actual results to differ materially from those expressed or implied in the forward-looking statements, including, among other things, the risk that the expected components of the program may not materialize; the expected market opportunities may not materialize; we may not be able to realize, integrate or validate expected product features or capabilities; delays, disruptions, challenges or increased costs in the ability to incorporate product features or achieve the expected product roadmap within the expected timelines; the complexity and uncertainties in developing and implementing solutions based on new features and technologies; lawsuits or disputes relating to our products; macroeconomic conditions, including general economic conditions in the semiconductor industry; legal restrictions; international conflicts and other risks and uncertainties described in Astera Lab’s Form 10-K, Form 10-Q and other filings with the SEC.
Forward-looking statements speak only as of the date on which they are made. Readers are cautioned not to place undue reliance on forward-looking statements, and no person undertakes any obligation to update or revise any such forward-looking statements, whether as a result of new information, future events or otherwise, except to the extent disclosure is required by law.
Contact:
Peter Lo
Peter.lo@asteralabs.com
